1. Filed of the Invention
This invention relates to an active matrix type of liquid crystal display device for performing a display operation using a two-terminal type active element such as an MIM (Metal-Insulator-Metal) element, an MIS (Metal-Insulator-Semiconductor) element, a ring diode, a varistor or the like, and particularly to a driving method for a liquid crystal display device to compensate for degradation of display quality due to a characteristic of the two-terminal type of active element.
2. Related Background Art
In comparison with a conventional passive type liquid crystal display device, an active matrix type liquid crystal device performs a high contrast display operation, and thus it is widely used in various display fields such as a liquid crystal television, a display terminal of a computer, etc.
As this active matrix type of liquid crystal device has been known a display device in which a two-terminal type active element such as an MIM element, an MIS element, a ring diode, a varistor or the like is installed to perform a switch-driving operation of each picture element, and another type display device in which a three-terminal active element such as a thin film transistor (TFT) is installed to perform the switch-driving operation of each picture element. In comparison with the latter, that is, the display device having the three-terminal type active element, the former, that is, the display device having the two-terminal type active element is more excellent in productivity because of a smaller number of manufacturing steps than the latter, and thus it has been expected to be more remarkably developed in the future.
The conventional types of liquid crystal display devices as described above are disclosed in U.S. Pat. No. 4,560,982, in SID International Symposium Digest of Technical Papers 91, P 226 by NEC Corp., Kawasaki, Japan, in SID International Symposium Digest of Technical Papers 87, P 304 by Seiko Epson Corporation, Nagano, Japan, and in SID International Symposium Digest of Technical Papers 84, P 54 by Suwa Seikosha Co., Ltd., Nagano, Japan.
Such conventional liquid crystal display devices are not equipped with a driving method according to this invention which will be described together with embodiments as described later. Through an earnest study, the inventor of this application has found the cause of degradation of display quality by a conventional driving method of the liquid crystal display device, and has proposed a countermeasure thereto.
The degradation of display quality which is caused by the conventional driving method will be first described in detail using an active matrix type liquid crystal display device of an embodiment (FIG. 1) of this invention as described later.
As shown in FIG. 1, the active matrix type liquid crystal display device comprises a liquid crystal panel 100, an X-drive circuit 200 and a Y-drive circuit 300. Each picture element of the liquid crystal panel 100 is line-sequentially scanned by the X-drive circuit 200 and the Y-drive circuit 300 to perform a display operation.
The liquid crystal panel 100 includes a set of plural column electrodes X.sub.1 to X.sub.M (in figure, an m-th column electrode X.sub.m is representatively represented) which are connected to the X-drive circuit 200, another set of plural row electrodes Y.sub.1 to Y.sub.N (in figure, n-th row electrode Y.sub.n is representatively represented) which are connected to the Y-drive circuit 300, the set of column electrodes (column electrode set) and the set of row electrodes (row electrode set) being provided on respective facing substrates so as to be intersected to each other, liquid crystal filled in a space between the set of the column electrodes X.sub.1 to X.sub.M and the set of the row electrodes Y.sub.1 to Y.sub.N, and two-terminal active elements each provided to each intersecting portion (picture element portion) between the column electrode and the row electrode). That is, describing representatively using the column electrode X.sub.m and the row electrode X.sub.n, a liquid crystal layer 102 serving as a picture element and a two-terminal type active element 103 are connected in series between the column electrode X.sub.m and the row electrode Y.sub.n, and the liquid crystal layer 102 and the two-terminal type active element 103 are supplied with a voltage V.sub.L and a voltage V.sub.D through a difference voltage between a column electrode signal VX.sub.m to be supplied to the column electrode X.sub.m and a row electrode signal HY.sub.n to be supplied to the row electrode Y.sub.n.
The X-drive circuit 200 is equipped with an a.c. video generating circuit 201 and an X shift register 202. The a.c. video generating circuit 201 receives a video signal P from an external, and outputs an a.c. video signal Ps which is synchronized with an a.c. inversion signal FR.
The X shift register serves to shift a shift start signal DX in synchronism with a shift clock signal X.sub.SCL having predetermined frequency f.sub.X to thereby successively generate sampling signals S.sub.1 to S.sub.M from respective output contact points corresponding to the column electrodes X.sub.1 to X.sub.M. In addition, a set of latch circuits and a set of column electrodes driving circuits are provided between the output contact points of the X shift register 202 and the column electrodes X.sub.1 to X.sub.M.
Detailing representatively a latch circuit and a column electrode driving circuit which are assigned to the m-th column electrode X.sub.m, a transmission line 203 through which the a.c. video signal Ps is transmitted is connected to the input contact point of a first analog switch 204 whose conducting and non-conducting states are switched in synchronism with the sampling signal S.sub.m, the output contact point of the first analog switch 204 is connected to a first sample-and-hold capacitor 205 and the input contact point of the second analog switch 206. The output contact point of the second analog switch 206 is connected to a second sample and hold capacitor 207 and the input contact point of a buffer amplifier 208, and the output contact point of the buffer amplifier 208 is connected to the column electrode X.sub.m.
The first analog switch 204 is switched to a conducting state in synchronism with the switching of the sampling signal S.sub.m to a logical value "H", and the a.c. video signal Ps at that time is held in the sample-and-hold capacitor 205. Thereafter, when the second analog switch 206 is switched to a conducting state in response to the switching of the latch pulse signal LP to a logical value "H", charges which have been accumulatively held in the first sample-and-hold capacitor 205 is transferred to and held in the second sample-and-hold capacitor 207, and the column electrode X.sub.m is supplied with a voltage corresponding to the charges held in the second sample-and-hold capacitor 207 through the buffer amplifier 208.
The Y-drive circuit 300 is equipped with a liquid crystal power generating circuit 301 and a Y shift register 302. The liquid crystal power generating circuit 301 receives four kinds of voltages V.sub.p, -V.sub.p, V.sub.a and -V.sub.a which satisfy the following inequality: .vertline.V.sub.p .vertline.&gt;.vertline.V.sub.a .vertline., where .vertline.a.vertline. represents an absolute value of a, and carries out a multiplexing operation in synchronism with the a.c. inversion signal FR to output two kinds of liquid crystal voltages V.sub.S and V.sub.N to the transmission lines 303 and 305, respectively. That is, when the a.c. inversion signal FR has a logical value "H", the liquid crystal voltage V.sub.S is equal to the voltage V.sub.p, while when the a.c. inversion signal FR has a logical value "L", the liquid crystal voltage V.sub.S is equal to the voltage -V.sub.p and the liquid crystal voltage V.sub.N becomes the voltage V.sub.a or -V.sub.a as described later. The a.c. inversion signal FR is a rectangular signal whose logical value is inverted every horizontal scanning period, and in other words it is a signal whose period corresponds to two horizontal scanning periods.
The Y shift register 302 serves to shift a shift start signal DY in synchronism with a shift clock signal Y.sub.SCL having a predetermined frequency f.sub.Y to successively generate selection signals C.sub.1 to C.sub.N from respective output contact points for the row electrodes Y.sub.1 to Y.sub.N. In addition, a set of selection circuits are provided between the respective contact points of the Y shift register 302 and the respective row electrodes Y.sub.1 to Y.sub.N.
Detailing representatively the switching circuit for the n-th row electrode Y.sub.n, a transmission line 303 is connected to the input contact point of a first analog switch 304 whose conducting and non-conducting states are switched in synchronism with a selection signal C.sub.n, the output contact point of the first analog switch 304 is connected to the row electrode Y.sub.n, a transmission line 305 is connected to the input contact point of a second analog switch 306 whose conducting and non-conducting states are switched in the opposite manner to that of the first analog switch 304 in synchronism with the selection signal C.sub.n, and the output contact point of the second analog switch 306 is connected to the row electrode Y.sub.n.
When the selection signal C.sub.n has a logical value "H", the first analog switch 304 and the second analog switch 306 are switched to the conducting state and the non-conducting state respectively, so that the liquid crystal voltage V.sub.S is supplied to the row electrode Y.sub.n. Inversely, when the selection signal C.sub.n has a logical value "L", the first analog switch 304 and the second analog switch 306 are switched to the non-conducting state and the conducting state respectively, so that the liquid crystal voltage V.sub.N is supplied to the row electrode Y.sub.N. In figures, signals to be supplied to the respective row electrodes Y.sub.1 to Y.sub.N are represented by row electrode signals HY.sub.1 to HY.sub.N.
Each two-terminal active element has a voltage-current characteristic (I-V characteristic) as shown in FIG. 2, which varies in accordance with voltage variation of the signals VX.sub.1 to VX.sub.M and HY.sub.1 to HY.sub.N which are supplied to the column electrodes X.sub.1 to X.sub.M and the row electrodes Y.sub.1 to Y.sub.N, respectively. Apparently from FIG. 2, the two-terminal active element has a non-linear characteristic in which a remarkable small amount of current flows through the two-terminal active element when a low voltage is supplied between both ends of the element, but the current is rapidly increased when a high voltage is supplied between both ends of the element. On the basis of the non-linearity of the characteristic of the two-terminal active element as described above, the two-terminal active element is supplied with a high voltage to perform a display operation (at a selection time), and with a low voltage to perform a non-display operation (at a non-selection time), whereby the driving of the liquid crystal is carried out.
The operation of the active matrix type liquid crystal display device thus constructed will be next described with reference to timing charts of FIGS. 3 and 4.
For example, assuming that a video signal P as shown in FIG. 3 is input to the a.c. video generating circuit 201, the phase of the video signal P remains invariable when the a.c. inversion signal FR has the logical value "H" while the phase is inverted to an opposite phase when the a.c. inversion signal FR has the logical value "L", and then the video signal P is outputted to the transmission line 203. A period for the former case is referred to as a non-inversion period, and a period for the latter case is referred to as an inversion period. Therefore, the a.c. video signal Ps is varied as shown in FIG. 3.
Here, the voltage V.sub.S of the a.c. video signal Ps has a 100% level for white at the non-inversion phase period and a 0% level (corresponding to a pedestal level) for white for the inversion phase period. Further, the voltage (-V.sub.a) is a 0% level (corresponding to the pedestal level) for white for the non-inversion period and a 100% level for white for the inversion phase period.
The Y shift register 302 serves to shift a shift start signal DY in synchronism with a shift clock signal Y.sub.SCL having a period corresponding to a horizontal scanning period to successively generate selection signals C.sub.1 to C.sub.N.
Each of the latch pulse signal LP and the shift start signal DX which are applied to the X-drive circuit 200 is a rectangular signal which has a logical value "H" in matching with the one-horizontal scanning period.
Next, an operation every one-horizontal scanning period will be described in detail with reference to an enlarged time chart at the lower side of FIG. 3. The latch pulse signal LP is switched to a state of a logical value "H" substantially in synchronism with the time when the a.c. video signal Ps is phase-inverted, and the shift start signal DX is switched to a state of a logical value "H" at the start time within each one-horizontal scanning period for which the a.c. video signal Ps exists. Further, the shift clock signal X.sub.SCL is provided with a sufficiently high frequency to enable the X shift register 202 to perform an M-stage shift operation within a period from the time when the shift start signal DX takes "H" until the time when the latch pulse signal LP takes "H".
Therefore, the X shift register 202 shifts the shift start signal DX in synchronism with the shift clock signal X.sub.SCL, thereby generating the sampling signals S.sub.1 through S.sub.m to S.sub.M in synchronism with the shift clock signal X.sub.SCL.
The sampling signals S.sub.1 to S.sub.M and the latch pulse signal LP are generated every one-horizontal scanning period for which a set of the row electrodes Y.sub.1 to Y.sub.N are successively scanned by the Y-drive circuit 300, so that the liquid crystal layer corresponding to picture element portions of the liquid crystal panel 100 are line-sequentially scanned by the signals VH.sub.1 to VX.sub.M and VX.sub.1 to HY.sub.N.
The timing at which the a.c. video signal Ps is held in the set of the first sample-and-hold capacitors of the X-drive circuit 200 is shifted by one horizontal period from the timing at which the charges held in the set of the first sample-and-hold capacitors are transferred to the set of the second sample-and-hold capacitors in synchronism with the latch pulse signal LP to simultaneously supply the column electrode signals VX.sub.1 to VX.sub.M to the column electrodes X.sub.1 to X.sub.M.
For example, an n-th a.c. video signal Ps which has been sampled with a sampling signal S.sub.m as shown in FIG. 3 (in figure, a sampling position is represented by a circle) is transferred to the column electrode X.sub.m in synchronism with the sampling timing of an (n+1)-th a.c. video signal Ps after one horizontal scanning period elapses from the sampling time of the n-th a.c. video signal Ps.
FIG. 4 shows timing charts representatively for a difference signal (VX.sub.m -HY.sub.n) applied between the column electrode X.sub.m and the row electrode Y.sub.n of difference signals (VX.sub.1 -HY.sub.1) to (VX.sub.m -HY.sub.n) which are applied at the intersecting portions between the set of column electrodes X.sub.1 to X.sub.M and the set of row electrodes Y.sub.1 to Y.sub.N.
The a.c. video signal Ps as shown in FIG. 4 corresponds to the a.c. video signal Ps as shown in FIG. 3, and the voltage levels V.sub.a and -V.sub.a correspond to 100% and 0% levels for white respectively for the non-inversion phase period, and 0% and 100% for white respectively for the inversion-phase period.
The row electrode signal HY.sub.n is equal to the liquid crystal voltage V.sub.S for a selection period (a period for which the selection C.sub.n is in a state of logical value "H") Ts, and is equal to the liquid crystal V.sub.N for a non-selection period (a period for which the selection signal C.sub.n is in a state of logical value "L") T.sub.N. Within the non-inversion phase period as described above, after the potential of the row electrode Y.sub.n is a positive potential V.sub.p for the selection period T.sub.S, it is changed to a potential V.sub.a for the non-selection period T.sub.N, while after the potential of the row electrode Y.sub.n is a negative potential -V.sub.p for the selection period T.sub.S, it is changed to a potential -V.sub.a for the non-selection period T.sub.N. Further, the column electrode signal VX.sub.m is formed by sampling and holding the a.c. video signal Ps as described with reference to FIG. 3.
On the basis of the relationship of the potentials of the electrodes as described above, the difference signal (VX.sub.m -HY.sub.n) has a waveform as shown by a solid line at the lower side of FIG. 4. A chain line of FIG. 4 shows a trace of potential variation at a contact portion of the liquid crystal layer 102 and the non-linear element 103. For the selection period T.sub.S, the two-terminal active element 103 is supplied with a large voltage, and thus apparently from the I-V characteristic of FIG. 2, a current flowing through the two-terminal active element is increased, so that the liquid crystal layer 102 is charged. The charge amount of the liquid crystal layer 102 corresponds to the amplitude of the difference signal (VX.sub.m -HY.sub.n) for the selection period T.sub.S. In other words, the charge amount is controlled by the level of the electrode signal VX.sub.m, and thus the sampling level of the a.c. video signal P.sub.S. As described above, a non-selection potential (a potential for the non-selection period) is variable in accordance with the polarity of a selection potential (a potential for the selection period) prior to the non-selection potential, so that the difference signal (VX.sub.m -HY.sub.n) has a positive level for a non-selection period T.sub.N after a selection period T.sub.S of positive polarity, but has a negative level for a non-selection period after a selection period T.sub.S of a negative polarity. Therefore, the voltage to be supplied to the two-terminal active element 103 for the non-selection period T.sub.N in both of the above cases is small, and thus the charges which have been charged into the liquid crystal layer 102 for the selection period T.sub.S are hardly discharged through the two-terminal active element. An effective voltage to be supplied to the liquid crystal layer 102 is proportional to the area of an oblique portion of FIG. 4, and is consequently dependent on the level of the sampled a.c. video signal Ps. The liquid crystal layer 102 serves to control light-transmissive amount in accordance with an effective voltage supplied thereto, and display an image on the liquid crystal panel 100.
If the driving method as shown by the timing chart of FIGS. 3 and 4 is used in place of the driving method of this invention in the active matrix type liquid crystal display device having two-terminal active elements, the following problems such as the degradation of display quality would occur due to the electrical characteristics of the two-terminal active element.
(First problem): MIM elements, MIS elements and other two-terminal active elements have an non-linear I-V characteristic as shown in FIG. 2. These elements are driven with a low voltage V at a non-selection time, and driven with a high voltage at a selection time to control charging and discharging operations of the liquid crystal layer for image display performance.
However, in the I-V characteristic of the actual two-terminal active element as shown in FIG. 2, the current I with the applied voltage of positive polarity (V) and the current -I with the applied voltage of negative polarity (-V) are not symmetrical to each other with respect to the origin of coordinates, and for example show an symmetrical characteristic as shown in FIG. 5 (as shown by absolute values). This asymmetrical characteristic of the actual two-terminal active element causes degradation of display quality. A problem occurring in a case as shown in FIG. 5, that is, in a case where the I-V characteristic for the applied voltage V having positive polarity is represented by a solid line a and the I-V characteristic for the applied voltage V having negative polarity is represented by a chain line b, will be described hereunder with reference to a timing chart of FIG. 4. The voltage V.sub.L applied to the liquid crystal layer 102 when the difference signal (VX.sub.m -HY.sub.n) has negative polarity is represented by a dotted line A of FIG. 4 while the voltage V.sub.L applied to the liquid crystal layer 102 when the difference signal (VX.sub.m -HY.sub.n) has positive polarity is represented by a dotted line C of FIG. 4. Apparently from FIG. 4, the absolute values of both of the applied voltages are different from each other between the above two cases. Therefore, there occurs a case where 0 V potential of the effective voltage to be supplied to the liquid crystal layer (as indicated by a one-dotted chain line OB in FIG. 4) is deviated from that at an ideal state by .DELTA.V, and thus a d.c. (direct current) offset voltage is applied to the liquid crystal layer. This offset voltage causes the liquid crystal panel to flicker and thus causes the display quality thereof to be degraded. In addition, the offset voltage also causes deterioration of the liquid crystal panel with time lapse, so that the reliability of the liquid crystal panel is reduced.
(Second problem): In addition, the MIM elements, the MIS elements and the other two-terminal active elements do not have necessarily an invariable single I-V characteristic as shown in FIG. 2, but have a characteristic which varies in accordance with a continually-applied voltage V as shown in FIGS. 6 and 7. FIG. 6 shows variation of the I-V characteristic with an applied voltage, in which an initial I-V characteristic as indicated by a solid line c is changed to that as indicated by a dotted line d due to a continually-applied voltage V, and FIG. 7 shows a variation amount (hereinafter referred to as "shift amount") of the I-V characteristic with variation of a voltage-applying time for each applied voltage. As shown in FIG. 6, even if the two-terminal active element has the I-V characteristic as indicated by the solid line c of FIG. 6 at the initial stage of the voltage application, the initial I-V characteristic is varied to that as indicated by the dotted line d of FIG. 6 after a time elapses, and stabilized to the I-V characteristic after the variation.
When the two-terminal active element is left for several hours while the applied voltage to the element is set to 0 volt, the I-V characteristic after variation is returned to the initial I-V characteristic as indicated by the solid line c. However, applying the voltage V to the two-terminal active element at the same condition again, the I-V characteristic as indicated by the solid line c is varied to that as indicated by the dotted line d. This variable characteristic (hereinafter referred to as "shift characteristic") differs in accordance with difference in applied voltage V (for example, in FIG. 7, the voltage V satisfies the following inequality: p&gt;r&gt;n&gt;f, and the shift characteristics of the respective I-V characteristics are different from each other). A time required for the I-V characteristic varied due to the continually-applied voltage to return to the initial I-V characteristic is longer as the shift amount (the variation amount as indicated by an arrow of FIG. 6) is increased. The shift characteristic is described in more detail in "E. Mizobatta, et al: SID 91 Digest, p.226 (1991)" or other papers.
In addition, there is a problem that the shift characteristic causes the occurrence of an afterimage on the liquid crystal panel. For example, it is assumed that a window pattern having a white portion at the center portion thereof and a black portion surrounding the white portion is first displayed on the liquid crystal panel as shown in FIG. 8(a), and then is changed to an overall white pattern (white raster). In this case, the first displayed window pattern is not completely erased, and it is left behind as an afterimage on the liquid crystal panel as shown in FIG. 8(b), so that the overall white pattern is not obtained on the liquid crystal panel. This so-called afterimage phenomenon is gradually extinguished as a long time elapses, but the display quality is remarkably degraded. The principle of occurrence of the afterimage phenomenon will be further described hereunder. In a case where the window pattern as shown in FIG. 8(a) is displayed in a normally black mode (it is black when a sufficient voltage is not applied to the liquid crystal layer, and white when a sufficient voltage is applied to the liquid crystal layer), the white display portion is supplied with a difference signal of applied voltage n as show in FIG. 8(c) for the selection period T.sub.S, while the black display portion is supplied with a difference signal of applied voltage f (f&lt;n) for the selection period T.sub.S. Therefore, the two-terminal active element located at the white display portion is supplied with a higher voltage than that located at the black display portion, so that apparently from FIGS. 6 and 7, the shift amount of the I-V characteristic of the two-terminal active element at the white display portion is larger than that of the two-terminal active element at the black display portion. Here, assuming that the whole screen of the liquid crystal panel is changed to the white pattern, the afterimage as shown in FIG. 8(b) occurs due to the difference of the shift amounts of the two-terminal active elements at the white and black display portions.
The afterimage phenomenon also occurs in a case where a window pattern having a white portion at the center portion of the liquid crystal panel and a black portion surrounding the white portion is first displayed on the liquid crystal panel, and then the whole screen of the liquid crystal panel is changed from the above display pattern to a display pattern having a half tone, and also in a case where a pattern having a half tone is first displayed on the liquid crystal panel, and then the display pattern is changed from the above pattern to a pattern having different half tone which is set with a lower voltage that the former pattern.
The afterimage phenomenon due to such an display pattern changing operation to a half tone pattern will be described in more detail. For example, the following assumption is introduced. As shown in FIG. 9, white and black are first displayed at the center portion and the surrounding portion of the liquid crystal panel, respectively, in which the black portion P1 is formed by a difference signal (VX.sub.m1 -HY.sub.n) which is applied through the column electrode .sub.m1 and the row electrode Y.sub.n and the white portion P2 is formed by a difference signal (VX.sub.m2 -HV.sub.n) which is applied through the column electrode X.sub.m2 and the row electrode Y.sub.n, and thereafter the display pattern changing operation to a half tone pattern is carried out by applying difference signals (VX.sub.m1 -HY.sub.n) and (VX.sub.m2 -HV.sub.n) which are equal to each other, so that an afterimage in which the central portion P2 is darker than the surrounding portion P1 as shown in FIG. 10.
In such a case, the difference signals (VX.sub.m1 -HY.sub.n) and (VX.sub.m2 -HY.sub.n) are applied in accordance with timing charts as shown in FIG. 11. That is, for each selection period T.sub.S (in a case of.sub.-- normally black display) within a period for which black and white are displayed, the voltage V.sub.msB of the difference signal (VX.sub.m1 -HY.sub.n) which is applied to the two-terminal active elements for the black portion P1 is lower than the voltage V.sub.msW of the difference signal (VX.sub.m2 -HY.sub.n) which is applied to the two-terminal active elements for the white portion P2. Therefore, apparently from FIGS. 6 and 7, the shift amount of the two-terminal active element for the portion P2 is larger than that of the two-terminal active element for the portion P1. In other words, the internal impedance of the two-terminal active element for the portion P2 is increased while the internal impedance of the two-terminal active element for the portion P1 is lower than the former, and this characteristic is maintained.
When the display pattern is changed from this state to a half tone display pattern, the amount of charges Q2 flowing into the liquid crystal layer through the two-terminal active element for the portion P2 is smaller that the amount of charges Q1 flowing into the liquid crystal layer through the two-terminal active element for the portion 1 within a half tone display period although the voltage V.sub.ms1 of the difference signal (VX.sub.m1 -HY.sub.n) and the voltage V.sub.ms2 of the difference signal (VX.sub.m2 -HY.sub.n) which are supplied for the selection period T.sub.S are voltages for the same half tone. Therefore, the effective voltage (which is proportional to the charge amount Q2) applied to the liquid crystal layer for the portion P2 for a non-selection period T.sub.N within the half tone display period is represented by an oblique portion S2 in FIG. 11 while the effective voltage (which is proportional to the charge amount Q1) applied to the liquid crystal layer for the portion P1 is represented by an oblique portion in FIG. 11, and thus the following inequality is apparently satisfied: S1&gt; S2. Therefore, a dark afterimage is formed at the portion P2 while a predetermined half tone image is formed at the portion P1. Such an afterimage phenomenon is called as "sticking phenomenon".